Showing posts with label Digital Logic Design. Show all posts
Showing posts with label Digital Logic Design. Show all posts

Sunday, November 4, 2012

Topics Covered

Number systems and codes, Digital logic: Boolean algebra, De-Morgan's law, Logic gates and their
truth tables, canonical forms, combinational logic circuits, minimization techniques, Arithmetic and
data handling logic circuit, decoders and encoders. Multiplexers and Demultiplexers. Combinational
Circuit design, Flip-flops, race around problems, Counters: Asynchronous and Synchronous
counters and their applications. Synchronous and asynchronous logic design: state diagram, Mealy
and Moore machine. State minimization and assignments. Pulse mode logic. Fundamental mode
logic design.

Friday, February 24, 2012

EEE Short Questions and Answers (Digital Logic)

Fig : Basic Digital Logic Gates (Symbol)

1. Define AND Gate ?
ans : A logic gate that produces a HIGH output only when all of the inputs are HIGH.

2. What is an Inverter ?
ans : A logic circuit that inverts or complements its input.

3. What is a NOR gate ?
ans : A logic gate in which the output is LOW when one or more of the inputs are HIGH.

4. What is Timing Diagram ?
ans : A diagram of waveforms showing the proper timing relationship of all the waveforms.

5. What is XOR (Exclusive OR) gate ?
ans :  A logic gate that produces a HIGH output only when its two inputs are at opposite levels.

6. What is SPLD ?
ans : Simple programmable logic device; an array of AND Gates and OR Gates that can be programmed to achieve specified logic functions. Four types are PROM, PLA, PAL and GAL.