Topics Covered

VLSI si  process technology. Si crystal growth and wafer preparation . epitaxial growth on Si substrate. Oxidation of Si. Lithography, diffusion: methods and models. Ion implantation, metallization. Overview and process flow of a CMOS and a BICMOS process. VLSI si  devices. Isolation techniques. Second order effects in BJT devices: base width modulation. Emitter current crowding, kirk effect . Second order effects in MOS devices: short channel effects, narrow width effects. Device scaling rules. Device models. Compact models for bipolar devices. Ebers-Moll type model. Gummel-poon type model and their implementation in SPICE. BJT model in SPICE2. Compactmodels for MOS transistor and  their implementation in SPICE. Level 1,2 and 3 MOS model parameters in SPICE. Parameter extraction for bipolar and MOS device models. Geometry, process and temperature dependency of bipolar and MOS model parameters. Parameter optimization, statistics of parameters and statistical modeling.